Implementing Energy-parsimonious Inexact/Approximate Circuits for Error-tolerant Applications
نویسندگان
چکیده
A. Lingamneni, J.-L. Nagel, P.-A. Beuchat, M. Morgan, C. C. Enz, C. Piguet In this paper, CSEM presents a novel cross-layer co-design framework for implementing high energy-parsimonious inexact circuits, or circuits in which the accuracy of the output can be traded for substantial cost (energy, delay and/or area) savings, with zero hardware overheads. Measured results of a prototype chip (consisting of various 64-bit arithmetic adders) demonstrated that dramatic energy savings as high as less than 4.8x when compared to the conventional correct circuits could be obtained through the proposed co-design approach for acceptable error, with the cumulative gains (quantified through the Energy-Delay-Area product metric) being as high as 13x!
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